Tag Archives: IBM

3D Thursday: Can IBM and 3M really build a 3D, 100-chip stairway to heaven with glue?

IBM and 3M have announced a program to develop heat-dissipating adhesives that would permit the construction of tall, 3D “towers” of silicon chips in 3D assemblies. The stated target: 100 stacked chips. Some things about 3D assembly are absolutely uncontroversial: … Continue reading

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What else can you do with IBM’s 45nm SOI process? More games, the Cell processor, and photonics

Last week, I wrote about IBM’s 45nm SOI process, which is now used in a variety of interesting applications such as the Jeopardy!-playing IBM Watson supercomputer, the soon-to-be-available Nintendo Wii U, and an experimental IBM brain simulator. I wondered what … Continue reading

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What can you do with 45nm SOI? A lot, it turns out

Cadence just published a story about working with IBM on developing advanced Spice-level simulation models for IBM’s advanced SOI (silicon on insulator) IC processes to achieve better correlation between the circuit simulation results and the actual silicon. Now you only … Continue reading

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Friday Video: Everything you wanted to know about double patterning at 20nm and below…but were afraid to ask

Dr. Lars Liebman at IBM gave a very clear talk about the need for double patterning at the 22nm and 14nm nodes while at DAC a couple of months ago. Until EUV is ready for production, which is not expected … Continue reading

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Google’s planned purchase of Motorola Mobility is a pure EDA360 play: Software drives Hardware

When I told my good friend David Thon that Google’s planned purchase of smartphone maker Motorola Mobility was a pure EDA360 play, he invited me to explain. In simplest terms, EDA360 posits that software now drives hardware in the processor-centric … Continue reading

Posted in Android, Apps, EDA360, Firmware, iOS, System Realization | Tagged , , , , , , , | 1 Comment

PCI Express takes on Apple/Intel Thunderbolt and 16 Gtransfers/sec at PCI SIG while PCIe Gen 3 starts to power up

Two articles from EETimes give an exciting picture for PCI Express’ short- and long-term future. On the most immediate front, 23 adapter cards and 19 systems from PC and peripheral makers participated in the most recent PCIe Gen 3 plugfests. … Continue reading

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Are FinFETs inevitable at 20nm? “Yes, no, maybe” says Professor Chenming Hu (Part 2)

Yesterday’s blog entry discussed FinFETs as a way to build advanced-process transistors with reduced leakage and improved performance. (See “Are FinFETs inevitable at 20nm? “Yes, no, maybe” says Professor Chenming Hu (Part 1)“.) There’s another way to eliminate the unwanted … Continue reading

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3D Thursday: Six more firms join Sematech 3D initiative

EETimes’ Peter Clarke reports that six more companies have joined the Sematech 3D enablement program. The six new members are: Advanced Semiconductor Engineering Inc. (ASE) Altera Corp Analog Devices Inc. (ADI) LSI Corp On Semiconductor Corp Qualcomm Inc These six … Continue reading

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ARM’s Cortex-A15: A big step up for the ARM processor architecture. Targeting 32nm and 28nm technology nodes.

Earlier this week Cadence announced that it worked with ARM to develop an implementation methodology for the recently announced, high-end ARM Cortex-A15 processor core, code-named Eagle. The ARM Cortex-A15 processor core has an expanded 40-bit (1Tbyte) memory address space (called … Continue reading

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