Tag Archives: IEEE Computer Society

Multicore, the Memory Wall, and Numerical Compression—FREE Webcast now available

Last month I posted a review of Al Wegener’s terrific IEEE Computer Society presentation “Multicore, the Memory Wall, and Numerical Compression.” (See “Will your multicore SoC hit the memory wall? Will the memory wall hit your SoC? Does it matter?”) … Continue reading

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IEEE Computer Society Lecture—Creating System-On-Chips: Mixing HW & SW Successfully

As soon as we started to incorporate processors on ASICs, thus instantly creating SoCs, hardware/software integration issues became fully intertwined with chip design. Today, we routinely put a dozen or more firmware-driven processing elements on our SoCs so the issues … Continue reading

Posted in EDA360, Silicon Realization, SoC, SoC Realization, System Realization, SystemC, TLM, Virtual Prototyping | Tagged , , , , | Leave a comment

Hear Toyota and GM talk about vehicle computer systems in a 5-screen world. Talks are free. Pizza is $2.

On July 12, the Silicon Valley Chapter of the IEEE Computer Society is hosting a “dual-core” presentation on the future of vehicle computer systems on the Cadence campus in San Jose, California. The speakers are Roger D. Melen, Senior Advisor … Continue reading

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