Tag Archives: IP Integration

Tales from the EDA CEOs: The EDAC panel talks about IP and SoC integration, power, and other topics

Richard Goering has written up last week’s EDA CEO panel, sponsored by EDAC (the EDA Consortium). The panel took place at the Silicon Valley Bank’s headquarters in Santa Clara, California and featured CEOs from four EDA companies—Cadence (Lip-Bu Tan), Gradient … Continue reading

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