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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- 3-processor SoC for digital still cameras incorporates an ARM 1136J-S RISC processor core plus separate image and video processors
- 3D Thursday: Three on 3D—papers from ISSCC
- 3D Thursday: Altera adds Avago MicroPOD optical interconnects to FPGA package to handle bidirectional 100Gbps Ethernet
- Power, Performance, Cost. FDSOI lets you pick any three. Want proof? How about an ARM Cortex-M0 processor core example?
- What are the challenges of EUV lithography and the issues surrounding double patterning? CDNLive! presentation provides details.
- What would you do with a 23,000-simultaneous-thread school of piranha?...asks NVIDIA
- Friday Video: Luigi Capodieci, a fellow at GLOBALFOUNDRIES, talks 20nm and below, EUV, FINFETs, and the state of the foundry business
- Download a free PDF of the Mixed-signal Methodology Guide, Chapter 1: Design Trends and Challenges
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Tag Archives: M3
A painless way to learn how to design and debug multicore ARM-based SoCs using SystemC and TLM 2.0
As SoCs become far more software-centric, and multicore SoCs even more so, Realization teams must prototype and debug their designs using virtual platforms before committing to the implementation phase or face the high risk of proceeding down the wrong architectural … Continue reading
Posted in ARM, EDA360, SoC Realization, System Realization, SystemC, TLM, Uncategorized, Virtual Prototyping
Tagged A9, Cortex, M3
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On-chip ARM Cortex-M3 processor provides security for AppliedMicro’s PowerPC-based PacketPro Embedded Processor
The “SlimPro” Trusted Management Module used in AppliedMicro’s PowerPC-based PacketPro embedded processor for networking applications uses an ARM Cortex-M3 processor that boots from on-chip ROM. The approach provides tamper-proof boot code that can then load additional boot and OC code … Continue reading
