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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- 3-processor SoC for digital still cameras incorporates an ARM 1136J-S RISC processor core plus separate image and video processors
- 3D Thursday: Micron’s 3D Hybrid Memory Cube delivers more DRAM bandwidth at lower power and in a smaller form factor using TSVs
- Collaboration is key to making DFM work at 28nm and below
- 3D Thursday: A look at some genuine 3D NAND cells, courtesy of Micron
- Friday Video: How many hardware/software integration lessons can you absorb in 34 minutes?
- The DDR4 SDRAM spec and SoC design. What do we know now?
- Clock Concurrent Optimization: The Primer to the Primer—OR—Want to overcome some major functional hurdles to Silicon Realization and save a lot of power on your SoC at the same time?
- Intel’s Knut Grimsrud explains how to get another 20x improvement in SSD performance
- Where is the mainstream IC process technology today? 28nm? 40nm? 65nm?
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Tag Archives: Open-Silicon
3D Thursday: ARM, HP, and SK hynix join Hybrid Memory Cube Consortium (HMCC)
Add ARM, HP, and SK hynix to the growing list of companies in the Hybrid Memory Cube Consortium (HMCC). The three new members join the original founding companies, Micron and Samsung, along with Altera, IBM, Microsoft, Open-Silicon, and Xilinx plus … Continue reading
Posted in 3D, Memory
Tagged Altera, Hybrid Memory Cube, Hynix, IBM, Micron Technology, Microsoft, Open-Silicon, Samsung, Xilinx
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3D Thursday: Hybrid Memory Cube—wide I/O only more so—gets an industry consortium
Back in August, I wrote about the 3D SDRAM assembly called the Micron Hybrid Memory Cube (HMC, see “Want to know more about the Micron Hybrid Memory Cube (HMC)? How about its terabit/sec data rate?”) and I called it a … Continue reading
Posted in 3D, EDA360, Memory, Samsung, SoC Realization
Tagged Altera, HMC, HMCC, Hybrid Memory Cube, Micron, Open-Silicon, Xilinx
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Open-Silicon’s Naveed Sherwani speaks about the verification crisis in SoC design with unusual clarity
Last month at DAC, Richard Goering interviewed Open-Silicon CEO Naveed Sherwani for ChipEstimate.tv. The main topic was Open-Silicon’s new “on time or on us” chip delivery program but the last few minutes of the 11-minute video interview cover the very … Continue reading
Posted in EDA360, Silicon Realization, SoC Realization, Verification
Tagged Open-Silicon
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How do you get a processor to tape out at 2.4 GHz? Silicon Realization
In the ramp-up to CDNLive! India this week, ASIC- and chip-design house Open-Silicon announced today that it has successfully taped out a processor design that will run at 2.4GHz using the end-to-end Cadence Silicon Realization product line. “We have fine … Continue reading
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