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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- EDA360 and the brand new Hewlett-Packard 15C Limited Edition RPN pocket scientific calculator
- EMA Design Automation announces FootprintGen—an app for Cadence Allegro and OrCAD PCB design tools that cuts the time needed to design PCB footprint models for new components
- ARM big.LITTLE multicore IP architecture wins a Microprocessor Report Analysts’ Choice Award
- Two more low-cost dev boards based on the ARM Cortex-M4 with 1Mbyte of Flash, 192Kbytes of RAM: $15.57 and up
- Download a free PDF of the Mixed-signal Methodology Guide, Chapter 1: Design Trends and Challenges
- Friday Video: Circuit simulation app for Android. SPICE for $10, runs in your hand? Well, almost.
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Tag Archives: PPA
5-minute, 20nm Q&A. All you need to know in 5 minutes.
What are the key advantages of moving to 20nm? There are three primary reasons why we are seeing more system and semiconductor companies consider 20nm: performance, power, and area (PPA). Essentially, this is a “next-node” answer, which is still as … Continue reading
Posted in 20nm, Silicon Realization, SoC, SoC Realization
Tagged 20nm, LDE, Multiple patterning, PPA
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Jim Hogan’s top six SoC trends for 2012. Want to know what they are?
Jim Hogan was the EDPS dinner speaker last week at the Monterey Peninsula Yacht Club and he held the audience captive for quite a while. Hogan is a well-known EDA venture capitalist. One of the highlights of his talk was … Continue reading
Posted in EDA360, Silicon Realization, SoC, SoC Realization
Tagged Jim Hogan, PPA, SoC
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