Tag Archives: runtime phase

Free Webinar. Maximize the power of UVM runtime phases to avoid common verification pitfalls.

Verification expert Kathleen Meade has authored a methodology for applying UVM runtime phases that appears in the second edition of the Cadence UVM Book. On December 7, Kathleen will present a free verification Webinar covering the following topics: Basics of … Continue reading

Posted in EDA360, SoC, SoC Realization, System Realization, Verification | Tagged , , , | Leave a comment