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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- The DDR4 SDRAM spec and SoC design. What do we know now?
- Generation-jumping 2.5D Xilinx Virtex-7 2000T FPGA delivers 1,954,560 logic cells using 6.8 BILLION transistors (PREVIEW!)
- 3D Thursday: Is 2.5D IC assembly “buzz-worthy”?
- 3D Week: Wide I/O SDRAM, Network on Chip, Multicore, TSV, Asynchronous Logic—3D SoC stack from CEA-Leti and ST-Ericsson hits all the advanced notes. Can you say “Tour de Force”?
- 3D Thursday: Altera adds Avago MicroPOD optical interconnects to FPGA package to handle bidirectional 100Gbps Ethernet
- 3D Thursday: More on the Xilinx Virtex 7 with 2.5D tiling. Wave of the future or stopgap measure?
- Clock Concurrent Optimization: The Primer to the Primer—OR—Want to overcome some major functional hurdles to Silicon Realization and save a lot of power on your SoC at the same time?
- 10 ways to get your EDA tools to run faster, smoother, and longer
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