Tag Archives: Sony

3D Thursday (Late): Sony to invest 80 billion Yen in stacked CMOS sensor manufacturing expansion

Quoting a corporate press release, the Web site http://www.dpreview.com reports that Sony Corp intends to invest approximately 80 billion Yen through the end of March, 2014 to expand its capacity to manufacture “stacked silicon sensors,” which are 3D IC assemblies … Continue reading

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3D Thursday: Lessons learned from the IMEC’s 3D DRAM-on-logic chip design work

I recently covered the groundbreaking WIOMING 3D chip design done by CEA-Imec in conjunction with ST-Ericsson. (See “3D Week: Wide I/O SDRAM, Network on Chip, Multicore, TSV, Asynchronous Logic—3D SoC stack from CEA-Leti and ST-Ericsson hits all the advanced notes. … Continue reading

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Apple iPhone 4S: How about a peek under the hood?

Friday was the first day to get your hands on an Apple iPhone 4S. I saw a photo in the San Jose Mercury News of Steve “Woz” Wozniak sitting in a lawn chair camped out at a local Apple store. … Continue reading

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3D Thursday: IMEC prototypes 3D chip stack, finds some thermal surprises

Imec and several of its 3D integration partners (Globalfoundries, Intel, Micron, Panasonic, Samsung, TSMC, Fujitsu, Sony, Amkor, and Qualcomm) have fabricated a 3-chip 3D IC stack demonstration prototype with the intent of proving several assembly methods plus electrical characteristics and … Continue reading

Posted in 3D, Silicon Realization, SoC Realization, System Realization, TSMC, TSV | Tagged , , , , , , , , , , | 1 Comment

Sony jumps into tablet game with flat S1 and clamshell, dual-screen S2 based on Android 3.0

Sony has decided to jump into the tablet pool. Today, the company announced two very different tablet products, code-named the S1 and S2, which are based on the new Android 3.0 operating system. Both tablets will have WiFi and WAN … Continue reading

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