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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- 3D Thursday: Intel Penwell SoC for mobile phones employs POP (package-on-package) LPDDR2 SDRAM to reduce power
- Between ASIC and microcontroller: It’s all about System Realization
- Where is the mainstream IC process technology today? 28nm? 40nm? 65nm?
- How about a quick and easy guide to ARM Cortex processor cores? Got one for you from ARM TechCon 2011
- Free live discussion on how you can develop the next great EDA company with host and perennial EDA VC Jim Hogan
- 3D Thursday: Intel and FinFETs (Tri-Gate transistors)—a different kind of 3D
- What can you do with 45nm SOI? A lot, it turns out
- Samsung 20nm test chip includes ARM Cortex-M0 processor core. How many will fit on the head of a pin?
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Tag Archives: stacked silicon
3D Thursday (Late): Sony to invest 80 billion Yen in stacked CMOS sensor manufacturing expansion
Quoting a corporate press release, the Web site http://www.dpreview.com reports that Sony Corp intends to invest approximately 80 billion Yen through the end of March, 2014 to expand its capacity to manufacture “stacked silicon sensors,” which are 3D IC assemblies … Continue reading
Posted in 3D, EDA360, Silicon Realization, SoC, SoC Realization
Tagged 3D, backside illumination, Sony, stacked silicon
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