Tag Archives: STATS ChipPAC

3D Thursday: TSMC’s 3D plans and the word on 3D from Xilinx, Nvidia, IMEC, and STATS ChipPAC

For another take on last month’s RTI 3D conference held in Burlingame, CA, see Dr. Phil Garrou’s blog on the ElectroIQ site. Click here. For previous EDA360 Insider coverage of this event, see “3D Week: Wide I/O SDRAM, Network on … Continue reading

Posted in 3D, EDA360, Silicon Realization, SoC Realization, System Realization, TSMC | Tagged , , , , | Leave a comment