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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Download a free PDF of the Mixed-signal Methodology Guide, Chapter 1: Design Trends and Challenges
- ARM Cortex-A15—does this processor IP core need a new category…Superstar IP?
- Is the Common Platform Alliance a credible competitor to TSMC?
- ARM drops Cortex-A7 core on unsuspecting market, devastates low-power SoC and application-processor landscapes. What’s it all mean?
- If Aladdin’s Genie lived in a Computer-on-Module, it might look like the Gumstix Overo
- Intel’s Knut Grimsrud explains how to get another 20x improvement in SSD performance
- What would you do with a 23,000-simultaneous-thread school of piranha?...asks NVIDIA
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- Experimental , ultra-low-power 1.2V, 65nm SoC from ST and MIT operates at 82.5MHz (!) maximum, 540KHz at 0.54V
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Tag Archives: Tri-Gate
GSA Silicon Summit to highlight cutting-edge IC technologies: 3D IC assembly, FinFETs, and SOI. April 26, Silicon Valley
The Global Semiconductor Alliance (GSA) is sponsoring a half-day event that will drill down into three of the leading-edge IC manufacturing technologies of the coming decade: 3D (and 2.5D) IC assembly, FinFETs (or Tri-gate FETs), and silicon-on-insulator (SOI) substrates. The … Continue reading
Posted in 2.5D, 20nm, 28nm, 32nm, 3D, EDA360, FDSOI, Silicon Realization, SoC, SoC Realization
Tagged Cisco, FinFET, IBM, Intel, Multigate device, STMicroelectronics, Tri-Gate
1 Comment
Are FinFETs inevitable at 20nm? “Yes, no, maybe” says Professor Chenming Hu
Intel announced in early May that it would be using “Tri-Gate” FETs to build microprocessors at the 22nm node. (See the previous EDA360 Insider post “3D Thursday: Intel and FinFETs (Tri-Gate transistors)—a different kind of 3D”). Intel’s Tri-Gate transistor structures … Continue reading
Posted in EDA360, Low Power, Silicon Realization
Tagged ETSOI, FinFET, Intel, Tri-Gate, UTBSOI
3 Comments
3D Thursday: Intel and FinFETs (Tri-Gate transistors)—a different kind of 3D
Earlier this month, Intel announced that it will be using Tri-Gate transistors (FinFETs) to build microprocessors at the 22nm process node. The microprocessor is code-named “Ivy Bridge.” It will be a 22nm version of the company’s Sandy Bridge processor and … Continue reading
Posted in 3D, EDA360, Low Power, Silicon Realization, SoC Realization
Tagged 22nm, FinFET, Intel, Ivy Bridge, Sandy Bridge, Tri-Gate, TSMC
3 Comments
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