Tag Archives: TSV

3D Thursday: A funny thing happened to me on the EDPS 3D-IC panel

Last Friday, I moderated an all-star, hand-picked 3D-IC panel at the Electronic Design Process Symposium (EDPS) in Monterey, California. The panel included: Phil Marcoux, Managing Director, PPM Associates, experienced packaging expert Herb Reiter, President of eda2asic, Chair of the Global … Continue reading

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Posted in 2.5D, 3D, EDA360, Silicon Realization, SoC, SoC Realization, System Realization | Tagged , , , | Leave a comment

3D Thursday: 3D ICs and analog chips. Where’s the match? Is there a match?

Dr. Venu Menon, VP of Analog Technology Development at TI, gave a deeply informative lunchtime keynote speech at this week’s ISQED Symposium. Most of Menon’s presentation discussed analog process technology: what’s important to analog chip design and manufacturing, what’s changed … Continue reading

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3D Thursday: Is Wide I/O SDRAM free for the end user???

A recent email from Marc Greenberg, Director of Product Marketing for the Cadence Design IP Group, suggested that Wide I/O used in a 3D stack is free for the end user. In other words, there’s no incremental cost in the … Continue reading

Posted in 3D, EDA360, Silicon Realization, SoC, SoC Realization, System Realization, Wide I/O | Tagged , , , , | Leave a comment

3D Thursday: CEA-Leti launches Open 3D IC assembly partnership program

ElectroIQ reports that CEA-Leti in Grenoble has just launched an Open 3D IC program to permit companies more open access to the 3D IC assembly technologies developed at the research center. Last December, CEA-Leti and ST-Ericsson made a joint presentation … Continue reading

Posted in 2.5D, 3D, EDA360, Silicon Realization, SoC, SoC Realization, System Realization, Wide I/O | Tagged , , , , , , | Leave a comment

3D Week: Wide I/O SDRAM, Network on Chip, Multicore, TSV, Asynchronous Logic—3D SoC stack from CEA-Leti and ST-Ericsson hits all the advanced notes. Can you say “Tour de Force”?

Yesterday, at the RTI 3D Conference, Pascal Vivet from CEA-Leti and Vincent Guérin from ST-Ericsson unveiled a 3D IC project that represents a real Tour de Force of cutting-edge system technology. The quest starts with a key question: “What’s the … Continue reading

Posted in 3D, ARM, EDA360, Silicon Realization, SoC, SoC Realization, System Realization | Tagged , , , , , , , , | Leave a comment

3D Thursday: Hybrid Memory Cube—Does anyone know what’s happening with IBM and Micron?

This week, IBM and Micron apparently made a joint announcement (or perhaps just IBM made an announcement) regarding the manufacture of Micron’s Hybrid Memory Cube. There are varying reports and I cannot find the original statements on either company’s Web … Continue reading

Posted in EDA360, Low Power, Memory, SoC, SoC Realization, System Realization, TSV | Tagged , , , | Leave a comment