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- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- 3D Thursday: Altera adds Avago MicroPOD optical interconnects to FPGA package to handle bidirectional 100Gbps Ethernet
- Qualcomm reveals more Snapdragon 4 SoC details in a White Paper. Want to know what’s inside?
- ARM drops Cortex-A7 core on unsuspecting market, devastates low-power SoC and application-processor landscapes. What’s it all mean?
- Download a free PDF of the Mixed-signal Methodology Guide, Chapter 1: Design Trends and Challenges
- How Skyera developed the 44Tbyte, enterprise-class Skyhawk SSD from the ground up. A System Realization story.
- EDA360 and the brand new Hewlett-Packard 15C Limited Edition RPN pocket scientific calculator
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- Who wants more technical detail on the Altera SoC FPGA? Altera says…you!
- By the numbers: 20nm (and 40nm, 32nm, 28nm, and 14nm) design to be discussed in technical detail at next week’s CDNLive! conference in Silicon Valley
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Tag Archives: Zynq
Friday Video: EDA360 Insider talks HW/SW Codesign and Xilinx Zynq Dev Board with ChipEstimate.TV at DAC
I spent a few minutes with Sean O’Kane of ChipEstimate.TV at DAC earlier this month talking about system design, HW/SW codesign, and the new Avnet Dev Board for the Xilinx Zynq-7000 EPP. Here’s the video:
Posted in DAC, EDA360, Silicon Realization, SoC, SoC Realization, System Realization
Tagged Xilinx, Zynq
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Friday Video: Two of this week’s EETimes ACE Award Winners related to each other: Xilinx Zynq and Cadence Virtual System Platform
This week at Design West in San Jose—the conference formerly known as the Embedded Systems Conference—EETimes gave out ACE awards to the year’s outstanding companies, people, and products. Two of the ACE winners have something in common. The first winner, … Continue reading
Posted in EDA360, SoC Realization, System Realization
Tagged Cadence, EPP, virtual prototype, Xilinx, Zynq, zynq 7000
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Friday Video: Want a demo of the Xilinx Zynq 7000 EPP virtual platform?
Don’t get the whole virtual platform thing as it applies to the new Xilinx Zynq 7000 EPP? Here’s the concise explanation and a demo in three and a half minutes from ChipEstimate.com.
Posted in EDA360, SoC Realization, System Realization, Virtual Prototyping
Tagged Xilinx, Zynq
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The other shoe drops: Altera introduces SoC FPGA, mates ARM Cortex-A9 dual-core processor complex with FPGA fabric
It’s been more than a year and a half since Xilinx first started to talk publicly about the fusion of processors and FPGAs—a product now known as Zynq. It seemed inevitable that Altera would eventually counter with a competing product … Continue reading
Posted in 28nm, ARM, EDA360, Silicon Realization, SoC, SoC Realization
Tagged Altera, Cortex-A9, FPGA, Xilinx, Zynq
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