Tag Archives: Zynq

Friday Video: EDA360 Insider talks HW/SW Codesign and Xilinx Zynq Dev Board with ChipEstimate.TV at DAC

I spent a few minutes with Sean O’Kane of ChipEstimate.TV at DAC earlier this month talking about system design, HW/SW codesign, and the new Avnet Dev Board for the Xilinx Zynq-7000 EPP. Here’s the video: Advertisements

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Friday Video: Two of this week’s EETimes ACE Award Winners related to each other: Xilinx Zynq and Cadence Virtual System Platform

This week at Design West in San Jose—the conference formerly known as the Embedded Systems Conference—EETimes gave out ACE awards to the year’s outstanding companies, people, and products. Two of the ACE winners have something in common. The first winner, … Continue reading

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Friday Video: Want a demo of the Xilinx Zynq 7000 EPP virtual platform?

Don’t get the whole virtual platform thing as it applies to the new Xilinx Zynq 7000 EPP? Here’s the concise explanation and a demo in three and a half minutes from ChipEstimate.com.

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The other shoe drops: Altera introduces SoC FPGA, mates ARM Cortex-A9 dual-core processor complex with FPGA fabric

It’s been more than a year and a half since Xilinx first started to talk publicly about the fusion of processors and FPGAs—a product now known as Zynq. It seemed inevitable that Altera would eventually counter with a competing product … Continue reading

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