Brian Bailey has just published an article on low-power design in the EE Life section of EETimes. (See “Power 101 – Power consumption”) Here is Bailey’s premise:
“Power, in my opinion, has become a game changer, not just for hardware design teams, but for system design in the bigger context.”
From my perspective, there’s nothing controversial at all about that statement. These days, power considerations drive all design either because of limited available power or because of heat dissipation. We are fully capable of designing ICs that will burn up without cryogenic cooling. Hardly practical for most designs.
I am in the middle of publishing a series of three blogs covering a one-evening presentation on low-power design given by UC Berkeley Professor Jan Rabaey at the January meeting of the Santa Clara Valley Chapter of the IEEE Solid State Circuits Society. If Bailey’s article interests you, then you might also be interested in the two published (of three planned) posts I’ve written about Rabaey’s presentation for the Low-powerDesign.com Web site: