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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- After Silicon, SoC, and System Realization comes Dynasty Realization
- 20nm design: What have we learned so far?
- EDA360 and the brand new Hewlett-Packard 15C Limited Edition RPN pocket scientific calculator
- Itching to try out the Xilinx Zynq-7000 EPP? Ask your doctor if Zedboard is right for you
- Agilent knocks one out of the park with new, low-cost line of digital scopes—a very competitive entry into the low-end DSO market and a perfect example of EDA360 design using end-to-end design and apps.
- Samsung 20nm test chip includes ARM Cortex-M0 processor core. How many will fit on the head of a pin?
- 3D Thursday: Micron to present Hybrid Memory Cube status at EDPS in Monterey, April 6—there’s a lot of news
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Tag Archives: DAC
This just out from DAC 2012: video interview with EDA bloggers Goering and Leibson on IP subsystems, 20nm, and more
Want to know what’s going to happen at DAC 2012? Oh, wait, that was a couple of weeks ago. Which is how long it took to get post this video of EDA bloggers Richard Goering and Steve Leibson from a … Continue reading
Posted in 20nm, 28nm, DAC, EDA360, Silicon Realization, SoC, SoC Realization, System Realization
Tagged DAC, Design Automation Conference, Richard Goering, Steve Leibson
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3D Thursday: SemiWiki’s Paul McLellan on the TSMC/Cadence 3D collaboration
Briefly noted: SemiWiki’s Paul McLellan has just published a short analysis of the 3D announcements made last week at DAC by TSMC and Cadence.
Some chip-design reality from Mentor’s Wally Rhines at last week’s annual DAC ESL panel
Last week at DAC, Mentor’s Chairman and CEO Wally Rhines chaired a panel on ESL but in his introduction, Wally spoke more about chip-design costs and associated software development. “The rapidly escalating cost of chip design has more to do … Continue reading
DAC 2012: Get answers to all of your EDA questions at 78 Cadence demo suite slots
Next week (Monday, Tuesday, and Wednesday) you can get all of your EDA questions answered at the Cadence DAC demo suites. There are 78 demos over the three days covering the following EDA topics: Mixed-signal and low-power design RTL-to-GDSII design … Continue reading
Posted in DAC, EDA360, Low Power, Mixed Signal, pcb, Silicon Realization, SoC, SoC Realization, System Realization, TLM, Verification, VIP, Virtual Prototyping
Tagged DAC, EDA, IC design, pcb, synthesis, verification
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Gary Smith’s Sunday Pre-DAC talk to focus on Multi-platform-based SoC Design Methodology
For years, EDA Analyst Gary Smith has given a pre-DAC talk on the major trends in EDA and in the design of SoCs and ICs. This year is no exception. Smith has reserved Salon 6 at the San Francisco Marriott … Continue reading
3D Thursday: Practical Approaches to 3-D IC—TSV/Silicon Interposer and Wide IO Implementation From People Who Have Been There, Done That
If you’re like me, you’ve heard more than enough theory about 3D IC assembly and you’re ready to get on with the main event and design something. Want to hear about 3D IC technology that works? Now? Then you will … Continue reading
Is there a Denali Party 2012? The most important question at DAC, answered.
Yes, Virginia, there is a Denali party this year at DAC. As DAC returns to San Francisco in 2012, the Denali Party by Cadence returns to an extremely popular party venue—Ruby Skye—which bills itself as San Francisco’s Number One Nightclub. … Continue reading
$2.50 buses from Silicon Valley to DAC! FREE WiFi. But you need to get a ticket. Hurry. Seats are limited
DAC takes place in San Francisco at Moscone Center. You are in Silicon Valley. It’s a classic Point A to Point B problem. Solve the problem for pocket change this year. Buses with FREE on-board WiFi will run from the … Continue reading
Friday Video: Gary Smith speaks at DAC 2011 about IP (very large and modifiable) and platform-based design
Earlier this year at DAC, the ever-present EDA observer John Cooley conducted a panel of experts to talk about EDA. One of the expert speakers was Gary Smith, who always has something (somethings!) interesting to say. This time, he’s talking … Continue reading
Friday Video (spilled to Monday): “I Love DAC” dating site video, not to be missed
Atrenta, Cadence, and Springsoft are again co-sponsoring free exhibit tickets to DAC under the “I Love DAC” program started last year. Atrenta has gone one step farther with this amusing video about the “I Love DAC” dating site and SoC … Continue reading
Friday Video: Jim Hogan’s DAC 2011 panel preview. Hogan’s Heroes to focus on SoC and System Realization
Jim Hogan’s annual Hogan’s Heroes panel is a real staple at DAC and this year won’t be any different. What is different this year is that DAC is making preview videos. So here’s Jim talking about what his panel will … Continue reading
How DAC Got Started: Richard Goering interviews Kaufman Award Winner Pat Pistilli
In this interview, Richard Goering talks with Pat Pistilli about his experiences with CAD tools in the early 1960s, the first DAC (then called SHARE – Society to Help Avoid Redundant Effort) in 1964, the growth and influence of DAC, … Continue reading
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