Tag Archives: 40nm

Need to make an ARM Cortex-A9 processor core all it can be?

A new blog published today on the ARM Web site titled “How do you take an ARM POP up one more notch?” describes a very recent collaboration between ARM and Cadence to enhance the ARM POP IP, which helps any … Continue reading

Posted in 40nm, ARM, Cortex-A9, Silicon Realization, SoC, SoC Realization, TSMC | Tagged , , , , | Leave a comment

By the numbers: 20nm (and 40nm, 32nm, 28nm, and 14nm) design to be discussed in technical detail at next week’s CDNLive! conference in Silicon Valley

There’s still time to register for CDNLive!, which is being held on March 13 and 14 at the Doubletree Hotel in San Jose, California so let me give you a few numbers to whet your appetite: 40nm, 32nm, 28nm, 20nm, … Continue reading

Posted in 14nm, 20nm, 28nm, 32nm, 40nm, CDNLive!, EDA360, Silicon Realization, SoC, SoC Realization, System Realization | Tagged , , , , , , , , , , | Leave a comment

Where is the mainstream IC process technology today? 28nm? 40nm? 65nm?

EDA companies like Cadence focus on developing the latest tools for bleeding-edge process technologies—28nm and 20nm today—and that’s been the emphasis of my blog posts from last week’s Global technology Conference (GTC). However, there was one panel at the conference … Continue reading

Advertisement

Posted in EDA360, Globalfoundries, Silicon Realization | Tagged , , , , , , , | Leave a comment

Want to know the three lessons for GLOBALFOUNDRIES from its 28nm high-K, metal-gate development?

Yesterday, I attended the Global Technology Conference, a chip-making extravaganza underwritten by GLOBALFOUNDRIES and its partners. Got several blog posts to write about this information-packed day but thought I’d start with the three lessons that GLOBALFOUNDRIES learned from its 28nm … Continue reading

Posted in EDA360, Globalfoundries, Silicon Realization | Tagged , | Leave a comment

Is 28nm really here? Now? When?

Last week at the Gartner Semiconductor Briefing held at the Doubletree Hotel in San Jose, Gartner Research Director Sam Wang presented a forecast for the way new IC process technologies will diffuse into the manufacturing mix. The chart he presented … Continue reading

Posted in EDA360, Silicon Realization | Tagged , , , , , , | Leave a comment

Check your system-level design assumptions at the door

Jon McDonald’s opinion piece, just published in the System-Level Design Community section of Chip Design Magazine’s site, is about assumptions built into the design of complex electronic systems. Although it’s not McDonald’s topic, his writing drove my thinking along another … Continue reading

Posted in EDA360, System Realization | Tagged , , , | Leave a comment