Tag Archives: Micron

3D Thursday: Micron to present Hybrid Memory Cube status at EDPS in Monterey, April 6—there’s a lot of news

Posted on March 29, 2012 by sleibson2

I’ve already written many blog entries about the Micron Hybrid Memory Cube (HMC), a 3D stacked memory device that can deliver a theoretical DRAM bandwidth of 128Gbytes/sec to a host system using a 4-die stack of DRAM (NOT SDRAM) on … Continue reading →

Posted in 3D, EDA360, Silicon Realization, SoC, SoC Realization | Tagged , , , | Leave a comment

3D Thursday: Lessons learned from the IMEC’s 3D DRAM-on-logic chip design work

Posted on February 9, 2012 by sleibson2

I recently covered the groundbreaking WIOMING 3D chip design done by CEA-Imec in conjunction with ST-Ericsson. (See “3D Week: Wide I/O SDRAM, Network on Chip, Multicore, TSV, Asynchronous Logic—3D SoC stack from CEA-Leti and ST-Ericsson hits all the advanced notes. … Continue reading →

Posted in 2.5D, 3D, EDA360, imec, SoC, SoC Realization | Tagged , , , , , , , , , , , , , , , | Leave a comment

3D Thursday: Let’s end 2011 with a high-performance DRAM memory stack design. How would you improve it?

Posted on December 28, 2011 by sleibson2

For the last 3D Thursday blog post of 2011in the EDA360 Insider, I thought I’d take a flight of fancy and try to put as many of this year’s 3D IC concepts as possible together to see what we might … Continue reading →

Posted in 2.5D, 3D, EDA360, Memory, SoC, SoC Realization, System Realization | Tagged , , , , , , | Leave a comment

3D Thursday: Hybrid Memory Cube—Does anyone know what’s happening with IBM and Micron?

Posted on December 1, 2011 by sleibson2

This week, IBM and Micron apparently made a joint announcement (or perhaps just IBM made an announcement) regarding the manufacture of Micron’s Hybrid Memory Cube. There are varying reports and I cannot find the original statements on either company’s Web … Continue reading →

Posted in EDA360, Low Power, Memory, SoC, SoC Realization, System Realization, TSV | Tagged , , , | Leave a comment

3D Thursday (early): Steve’s Improbable History of 3D ICs? Six decades of 3D electronic packaging

Posted on November 9, 2011 by sleibson2

Last week at the 9th International SoC Conference in Newport Beach, I moderated a 3D IC panel that did a great job of exploring today’s state of the art for 3D IC development. I will be blogging the presentations made … Continue reading →

Posted in 28nm, 3D, EDA360, Low Power, Memory, TSV | Tagged , , , , , , , , , , , | 1 Comment

3D Thursday: Hybrid Memory Cube—wide I/O only more so—gets an industry consortium

Posted on October 13, 2011 by sleibson2

Back in August, I wrote about the 3D SDRAM assembly called the Micron Hybrid Memory Cube (HMC, see “Want to know more about the Micron Hybrid Memory Cube (HMC)? How about its terabit/sec data rate?”) and I called it a … Continue reading →

Posted in 3D, EDA360, Memory, Samsung, SoC Realization | Tagged , , , , , , | Leave a comment

Want to know more about the Micron Hybrid Memory Cube (HMC)? How about its terabit/sec data rate?

Posted on August 22, 2011 by sleibson2

Last week, I quoted Ann Steffora Mutschler’s article about the information that Micron has revealed about it’s 3D Hybrid Memory Cube. Now that I’ve got the paper Micron presented at last week’s Hot Chips 23 conference, I’d like to explain … Continue reading →

Posted in 3D, EDA360, Packaging, Silicon Realization, TSV | Tagged , , , , | 2 Comments

3D Thursday: Micron’s 3D Hybrid Memory Cube delivers more DRAM bandwidth at lower power and in a smaller form factor using TSVs

Posted on August 18, 2011 by sleibson2

Ann Steffora Mutschler’s interview with Scott Graham, general manager for Micron’s Hybrid Memory Cube (HMC) and Joe Jeddeloh, whose team developed the logic portion of the HMC alerted me to the existence of Micron’s new Hybrid Memory Cube, a 3D … Continue reading →

Posted in 3D, EDA360, Silicon Realization, SoC Realization, System Realization, TSV | Tagged | Leave a comment

3D Thursday: A look at some genuine 3D NAND cells, courtesy of Micron

Posted on August 11, 2011 by sleibson2

Glen Hawk, Vice President of the NAND Solutions Group at Micron, was giving the usual polished corporate keynote presentation at this week’s Flash Memory Summit held in Santa Clara, CA. Suddenly, his level tone of voice changed and he got … Continue reading →

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3D Thursday: IMEC prototypes 3D chip stack, finds some thermal surprises

Posted on July 14, 2011 by sleibson2

Imec and several of its 3D integration partners (Globalfoundries, Intel, Micron, Panasonic, Samsung, TSMC, Fujitsu, Sony, Amkor, and Qualcomm) have fabricated a 3-chip 3D IC stack demonstration prototype with the intent of proving several assembly methods plus electrical characteristics and … Continue reading →

Posted in 3D, Silicon Realization, SoC Realization, System Realization, TSMC, TSV | Tagged , , , , , , , , , , | 1 Comment

Apps Driven: Micron COO Mark Durcan telegraphs an apps-driven approach

Posted on November 15, 2010 by sleibson2

Everyone knows Micron as a memory maker; The company has been a DRAM leader since the 1980s. However, memory alone is not a great, long-term business because of the big swings in revenue as memory chips go through boom and … Continue reading →

Posted in Apps, EDA360 | Tagged | Leave a comment