Search EDA360 Insider
Hey!!! Subscribe now to the EDA360 Insider!
-
Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
EDA360 Tag Cloud
- 2.5D
- 3D
- 3D IC
- 20nm
- 28nm
- 32nm
- 40nm
- Agilent
- Altera
- AMD
- Analog
- Android
- Apple
- ARM
- ARM architecture
- ARM Cortex-A15
- ASIC
- Broadcom
- Cadence
- Canon
- Cortex
- Cortex-A15
- Cortex-M0
- DAC
- Dave Jones
- DDR3
- DDR4
- Double Patterning
- EDA
- EDPS
- Field-programmable gate array
- FinFET
- Flash
- Flash memory
- FPGA
- Freescale
- Freescale Semiconductor
- GlobalFoundries
- IBM
- Intel
- IP
- iPad
- iPhone
- JEDEC
- Jim Hogan
- Kinect
- Linux
- Low Power
- Lytro
- microcontroller
- Micron
- Microsoft
- Mixed Signal
- Multi-core processor
- Nvidia
- OrCAD
- pcb
- Printed circuit board
- Qualcomm
- Robot
- Samsung
- SDRAM
- Snapdragon
- SoC
- STMicroelectronics
- SystemC
- Texas Instruments
- TI
- TSMC
- USB
- verification
- video
- Wide I/O
- Xilinx
Top Posts
- Download a free PDF of the Mixed-signal Methodology Guide, Chapter 1: Design Trends and Challenges
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Qualcomm reveals more Snapdragon 4 SoC details in a White Paper. Want to know what’s inside?
- ARM Cortex-A15—does this processor IP core need a new category…Superstar IP?
- My workbench from 1978 highlighted in EETimes as one of engineering’s messiest desks
- 3D Thursday: 28nm design and 2.5D packaging saves Xilinx a ton of power. You can too even if you're not designing FPGAs!
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- ARM unveils 64-bit v8 architecture at ARM TechCon 2011
Download the EDA360 Vision Paper here:
Tag Archives: EDPS
3D Thursday: Micron to present Hybrid Memory Cube status at EDPS in Monterey, April 6—there’s a lot of news
I’ve already written many blog entries about the Micron Hybrid Memory Cube (HMC), a 3D stacked memory device that can deliver a theoretical DRAM bandwidth of 128Gbytes/sec to a host system using a 4-die stack of DRAM (NOT SDRAM) on … Continue reading
Posted in 3D, EDA360, Silicon Realization, SoC, SoC Realization
Tagged EDPS, HMC, IBM, Micron
Leave a comment
Want more information on ARM’s view of the server landscape? Attend EDPS on April 5
In just a couple of weeks, plus a day or two, ARM’s Director of Server Systems and Ecosystem Ian Ferguson will be presenting ARM’s views about the server market in the “Low-Power with Performance” session of the EDPS Workshop. With … Continue reading
EDPS 3D Friday (April 6) expands with new speakers including 3D IC assembly and packaging advocate Phil Marcoux
I’ve written previously about the all-3D IC design, assembly, and packaging program that will take place during the second day of the EDPS (Electronic Design Process Symposium) workshop in Monterey. This blog post is to let you know that additional … Continue reading
Posted in 2.5D, 3D, EDA360, Silicon Realization, SoC, SoC Realization, System Realization
Tagged 2.5D, 3D, EDPS
Leave a comment
Less than two weeks left for early-bird EDPS registration. Don’t miss 3D Friday, the other EDA speakers, or your chance to network for that matter
EDPS (The Electronic Design Process Symposium) provides a dynamic venue for the exchange of ideas among the top thinkers, movers, and shakers in EDA, who focus on how chips and systems are designed in the electronics industry. Attendees of this … Continue reading
3D Thursday (late): Qualcomm’s Riko Radojcic to keynote 3D Friday at EDPS in Monterey, April 6
EDPS—the world’s “best” conference devoted to discussing the processes needed for advanced electronic design—is dedicating its entire second day (Friday, April 6) to 3D IC topics. The just-announced keynote speaker is Riko Radojcic, Director of Design for Silicon Initiatives at … Continue reading
Posted in 2.5D, 3D, EDA360
Tagged 3D, 3DIC, EDPS, Monterey, Monterey California, Qualcomm
Leave a comment
3D Thursday: EDPS conference features 3D Friday
The Electronic Design Process Symposium soon to be held in Monterey, California, will devote all of Friday, April 6 to 3D IC issues. There will be three morning presentations and a 5-person panel in the afternoon. The EDPS Program Web … Continue reading
Posted in 2.5D, 3D, EDA360, Silicon Realization, SoC, SoC Realization, System Realization
Tagged 3D, EDPS, IC
Leave a comment
EDA VC Jim Hogan to connect the dots between user experience and SoC Realization at EDPS in April
It’s pretty hard to go from high-level customer expectations for an end product to the definition of an SoC. If it were easy, everyone would be able to do it. You have a unique chance to hear EDA venture capitalist … Continue reading
Posted in EDA360, Silicon Realization, SoC, SoC Realization
Tagged EDA, EDPS, Jim Hogan, Monterey Beach Resort, SoC Realization
Leave a comment
Do you want to be on the forefront of EDA? Ready to help improve the overall design process? Read on.
There’s an annual meeting that focuses on the overall design process that’s coming up in April and it’s not too soon to start thinking about it. After all, you might want to present something. The theme of this year’s annual … Continue reading
18th Annual Electronic Design Process Symposium brings together the top thinkers of the EDA world, April 7-8, Monterey, CA
EDPS (The Electronic Design Process Symposium) provides an exchange of ideas among the top thinkers, movers, and shakers who focus on how chips and systems are designed in the electronics industry. Attendees of this elite workshop have met each year … Continue reading
EDA360 Insider 