Search EDA360 Insider
Hey!!! Subscribe now to the EDA360 Insider!
-
Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
EDA360 Tag Cloud
- 2.5D
- 3D
- 3D IC
- 20nm
- 28nm
- 32nm
- 40nm
- Agilent
- Altera
- AMD
- Analog
- Android
- Apple
- ARM
- ARM architecture
- ARM Cortex-A15
- ASIC
- Broadcom
- Cadence
- Canon
- Cortex
- Cortex-A15
- Cortex-M0
- DAC
- Dave Jones
- DDR3
- DDR4
- Double Patterning
- EDA
- EDPS
- Field-programmable gate array
- FinFET
- Flash
- Flash memory
- FPGA
- Freescale
- Freescale Semiconductor
- GlobalFoundries
- IBM
- Intel
- IP
- iPad
- iPhone
- JEDEC
- Jim Hogan
- Kinect
- Linux
- Low Power
- Lytro
- microcontroller
- Micron
- Microsoft
- Mixed Signal
- Multi-core processor
- Nvidia
- OrCAD
- pcb
- Printed circuit board
- Qualcomm
- Robot
- Samsung
- SDRAM
- Snapdragon
- SoC
- STMicroelectronics
- SystemC
- Texas Instruments
- TI
- TSMC
- USB
- verification
- video
- Wide I/O
- Xilinx
Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- ARM drops Cortex-A7 core on unsuspecting market, devastates low-power SoC and application-processor landscapes. What’s it all mean?
- 3D Thursday: More on the Xilinx Virtex 7 with 2.5D tiling. Wave of the future or stopgap measure?
- Microprocessor Report publishes extremely interesting comparison of STMicroelectronics SPEAr-1300 and Xilinx Zynq ARM-based, dual core application processors
- ARM adds ARM Cortex-A15 and Cortex-R5 models to Fast Models 6.1 release, making these cores immediately available to System Realization teams
- 3D Thursday: How Xilinx developed a 2.5D strategy for making the world’s largest FPGA and what the company might do next with the technology
- Friday Video: Ready for a little mobile phone teardown archaeology? Dave Jones compares state of the art in 1994 (Motorola) with an evolved 2000 (Nokia)
- Want details on the TSMC 20nm process technology?
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
Download the EDA360 Vision Paper here:
Tag Archives: 3D IC
3D Thursday: Some unexpected implications of IP subsystems coupled with 3D IC assembly
A new “Experts at the Table” conversation on the Semiconductor Manufacturing and Design Community (SMD) site about IP Subsystems among Kevin Meyer, vice president of design enablement strategy and alliances at GlobalFoundries; Steve Roddy, vice president of marketing at Tensilica; … Continue reading
Posted in 3D, EDA360
Tagged 3D IC, Atrenta, GlobalFoundries, IP Subsystems, Tensilica
Leave a comment
3D preview from EDPS: Qualcomm’s Director of Engineering Riko Radojcic talks 3D and 3D EDA
Last week’s Electronic Design Process Symposium (EDPS) opened a rich new vein of 3D IC material and you’ll see a lot nuggets from me on that topic in the next few days. Meanwhile, Richard Goering has already published a post … Continue reading
Posted in 2.5D, 3D, EDA360, Silicon Realization, SoC, SoC Realization, System Realization
Tagged 2.5D, 3D IC, EDA, Qualcomm
Leave a comment
3D Thursday: CEA-Leti launches Open 3D IC assembly partnership program
ElectroIQ reports that CEA-Leti in Grenoble has just launched an Open 3D IC program to permit companies more open access to the 3D IC assembly technologies developed at the research center. Last December, CEA-Leti and ST-Ericsson made a joint presentation … Continue reading
Posted in 2.5D, 3D, EDA360, Silicon Realization, SoC, SoC Realization, System Realization, Wide I/O
Tagged 3D, 3D IC, CEA-Leti, micro pillar, microbump, ST Ericsson, TSV
Leave a comment
3D Thursday (OK, Friday): Live from Newport Beach—The IEEE 3D IC Workshop
I’m attending the all-day workshop on 3D ICs being held by the local IEEE Chapter of the CPMT (Components, Packaging, and Manufacturing Technology) Society and it’s a huge success with 150 attendees. I’m busy listening to presentations, but here’s a … Continue reading
3D Thursday: A busy week coming up for 3D ICs
This is a very busy week for 3D in the world of the EDA360 Insider. I am about to board a plane for John Wayne Airport to attend an IEEE workshop on 3D IC assembly. Next Monday, there’s a meeting on … Continue reading
Posted in 2.5D, 3D, EDA360, Silicon Realization, SoC, SoC Realization, System Realization
Tagged 3D, 3D IC
Leave a comment
3D Thursday: How do you get to 3D ICs? The EDA view
My second panelist to speak on last week’s 3D IC panel at the 9th International SoC Conference in Newport Beach was Samta Bonsal who manages Silicon Realization Strategic Marketing at Cadence Design Systems. Samta has two hats at Cadence. One … Continue reading
Posted in 3D, Ecosystem, EDA360, Silicon Realization, SoC Realization, System Realization
Tagged 3D IC, Cadence, IC design flow, OpenAccess
Leave a comment
3D Thursday: Where can you start with 3D?
My first panelist to speak on last week’s 3D IC panel at the 9th International SoC Conference in Newport Beach was Herb Reiter, generally known as “Mr. 3D.” Herb knows everyone in the industry connected to anything 3D. He’s been … Continue reading
Posted in 3D, EDA360, Silicon Realization, SoC Realization, System Realization
Tagged 3D, 3D IC, GSA, Sematech, Xilinx
Leave a comment
3D Thursday (early): Steve’s Improbable History of 3D ICs? Six decades of 3D electronic packaging
Last week at the 9th International SoC Conference in Newport Beach, I moderated a 3D IC panel that did a great job of exploring today’s state of the art for 3D IC development. I will be blogging the presentations made … Continue reading
3D Thursday: Low-cost, all-day workshop on 3D IC to be held in Newport Beach, December 9. Early bird discount ends November 25
This has to be the 3D IC educational bargain for this year. The Orange County Chapter of the IEEE Components, Packaging and Manufacturing Technology (CPMT) Society is sponsoring an all-day workshop on 3D IC technology on December 9, 2011. The … Continue reading