Tag Archives: Samsung

Samsung extends Android Galaxy to a credible point-and-shoot camera

You can now add Samsung to a small-but-growing list of digital camera vendors offering Android-based point-and-shoot cameras. The first was Nikon, announcing the S800c camera last week. (See “Nikon announces Android-powered camera: the $349 Coolpix S800c”) Now Samsung has introduced … Continue reading

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Daniel Nenni at SemiWiki publishes a [very] brief history of the SoC

Daniel Nenni has just posted a very brief history of the SoC, with heavy emphasis on SoCs for mobile products. The emphasis is probably warranted because mobile designs really have driven SoC design for the past decade. One of the … Continue reading

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Samsung Exynos 5 Dual mobile processor features two 1.7GHz ARM Cortex-A15 processors, a WQXGA display controller, and two LPDDR3 controllers to feed ‘em

This past weekend, the Web was abuzz with last week’s unveiling of Samsung’s Exynos 5 Dual mobile processor. This SoC features two 1.7GHz ARM Cortex-A15 processors rather than the previous Exynos generation Dual mobile processor that incorporated two 1.4GHz ARM … Continue reading

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3D Thursday: ARM, HP, and SK hynix join Hybrid Memory Cube Consortium (HMCC)

Add ARM, HP, and SK hynix to the growing list of companies in the Hybrid Memory Cube Consortium (HMCC). The three new members join the original founding companies, Micron and Samsung, along with Altera, IBM, Microsoft, Open-Silicon, and Xilinx plus … Continue reading

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Beyond breakfast: An ethical bribe for attending “The Path to Yielding at 2(x)nm and Beyond” at DAC

Yesterday, I wrote about a terrific discussion panel about the challenges of 20nm design at DAC. I am moderating the panel and there will be speakers from the Common Platform partners including IBM, Samsung, GLOBALFOUNDRIES (just confirmed!), and Cadence. (See … Continue reading

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At DAC, take the path to successful 20nm design. The same path leads to breakfast. Wednesday, June 6

If you’ve been following along—or even if you haven’t—Cadence held three 20nm Webinars last week. Perhaps you have to see it in person before you believe it. Fair enough. Here’s your chance to hear first-hand how you can develop high-yielding … Continue reading

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FREE Webinar on the Challenges of 20nm design. Second in a 3-part series from Cadence

The second of a series of three Cadence Webinars on 20nm design is now archived and available for viewing if you missed the live event. You can read about this Webinar in Richard Goering’s blog (“Cadence, Samsung Detail 20nm RTL-to-GDSII … Continue reading

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Friday Video: Short video demonstrates Samsung Exynos quad-core ARM Cortex-A9 mobile application processor against dual-core

This short 1.5-minute video gives you a high-level overview of the relative performance of a Samsung Exynos 4-core mobile applications processor based on the ARM Cortex-A9 processor core versus a dual-core version.

Posted in ARM, Cortex-A9, EDA360, Samsung, Silicon Realization, SoC, SoC Realization | Tagged , , , | Leave a comment

Three free Webinars answer your questions on 20nm SoC design. What questions do you have?

What can you reasonably expect to get from 20nm? What does it take to implement an ARM Cortex-A15 processor in 20nm? What might come between you and success at 20nm? How can you be more productive when creating 20nm designs? … Continue reading

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Want more information on the ARM Cortex-M0+ processor core?

Last week, ARM CPU Product Manager Thomas Ensergueix presented a Webinar on the ARM Cortex-M0+ processor core, which I’ve covered previously over on the Low-PowerDesign.com Web site http://www.low-powerdesign.com. (See “How low can you go? ARM does the limbo with Cortex-M0+ … Continue reading

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Common Platform: Why do these companies (IBM, Samsung, GLOBALFOUNDRIES) collaborate?

Ana Hunter, Foundry Services VP at Samsung Semiconductor, had the honor of kicking off the Global Technology Forum in Silicon Valley. She decided to devote her short intro speech to answering the basic question about the Common Platform—a partnership among … Continue reading

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Want to know what’s going to happen at 20nm, 14nm, and beyond? A few answers from Frank Leu of Cadence

Last week at the Global Technology Forum held at the Santa Clara Convention Center in Silicon Valley, Cadence VP of R&D Frank Leu discussed the things we’ve learned about 20nm IC manufacturing, what we are learning about 14nm, and where … Continue reading

Posted in 14nm, 20nm, 28nm, EDA360, Globalfoundries, Samsung, Silicon Realization, SoC, SoC Realization, System Realization | Tagged , , , , , , | 2 Comments

[Friday Video] iFixit tears down an iPad 3 4G LTE using spudger, heat gun, and guitar picks. Finds new processor, more RAM, new battery, etc.

Those folks at iFixit stop at nearly nothing to be the first to tear apart shiny new toys like the new Apple iPad (the iPad formerly known as the iPad 3). They flew to Australia to get a new iPad … Continue reading

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By the numbers: 20nm (and 40nm, 32nm, 28nm, and 14nm) design to be discussed in technical detail at next week’s CDNLive! conference in Silicon Valley

There’s still time to register for CDNLive!, which is being held on March 13 and 14 at the Doubletree Hotel in San Jose, California so let me give you a few numbers to whet your appetite: 40nm, 32nm, 28nm, 20nm, … Continue reading

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Friday Video: Common Platform Technology Forum reveals program agenda, rolls into Silicon Valley on March 14

The Common Platform partners are IBM, Samsung, and GLOBALFOUNDRIES and their annual Technology Forum  rolls into Silicon Valley on March 14, so you have a couple of weeks to sign up. This short video from ChipEstimate.com gives you a good … Continue reading

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3D Thursday: Lessons learned from the IMEC’s 3D DRAM-on-logic chip design work

I recently covered the groundbreaking WIOMING 3D chip design done by CEA-Imec in conjunction with ST-Ericsson. (See “3D Week: Wide I/O SDRAM, Network on Chip, Multicore, TSV, Asynchronous Logic—3D SoC stack from CEA-Leti and ST-Ericsson hits all the advanced notes. … Continue reading

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Friday Video: Samsung helps you visualize the benefits of multiple cores

For most engineers, the benefits of having multiple processor cores seem pretty obvious. More resources can do more in less time. However, if you still have trouble visualizing the advantages, here’s Samsung’s 30-second video to clarify things:

Posted in EDA360, Multicore, SoC, SoC Realization | Tagged , , | 1 Comment

How fast can an ARM Cortex-A15 run? 2GHz in Samsung’s 32nm process technology. That’s fast!

At the eighth annual Samsung Mobile Solutions Forum held at the Westin Taipei, Taiwan, Samsung previewed the Exynos 5250 applications processor, which is based on a dual-core implementation of the ARM Cortex-A15 processor running at 2GHz implemented in the company’s … Continue reading

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Would you like some ARM Cortex-A15 resources to peruse?

Thanks to LinkedIn ARM Based Group community manager Stephan Cadene, we’ve got several pointers to useful documents describing many aspects of the ARM Cortex-A15 processor core. This is all in preparation for many discussions of the ARM Cortex-A15 processor taking … Continue reading

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Want some more details about the Samsung 20nm test chip? Here’s your chance: ARM TechCon 2011 on October 25

Later this month, you have the opportunity of attending the ARM TechCon 2011 conference being held in the Santa Clara Convention Center in California. Tuesday, October 25 is dedicated the many different aspects of advanced to SoC design and the … Continue reading

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Which semiconductor vendors are the top four IC design companies and why? (According to Gary Smith)

Gary Smith, probably the best-known EDA analyst in the country, has just published his top-4 list of IC design houses marketing semiconductors. Here’s the short version with brief explanations. (For the whole megillah, see his free report.) NVIDIA—Best vision of … Continue reading

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3D Thursday: IMEC prototypes 3D chip stack, finds some thermal surprises

Imec and several of its 3D integration partners (Globalfoundries, Intel, Micron, Panasonic, Samsung, TSMC, Fujitsu, Sony, Amkor, and Qualcomm) have fabricated a 3-chip 3D IC stack demonstration prototype with the intent of proving several assembly methods plus electrical characteristics and … Continue reading

Posted in 3D, Silicon Realization, SoC Realization, System Realization, TSMC, TSV | Tagged , , , , , , , , , , | 1 Comment

What’s that light at the end of the tunnel? It’s the 20nm express heading your way

Cadence sponsored a lunchtime discussion panel on 20nm design today at DAC. Veteran industry analyst Jim Handy moderated the panel and the panelists included Simon Segars, Executive Vice President and General Manager for Physical IP from ARM; Ana Hunter, Vice … Continue reading

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What can you do in 20nm? Now? Today? Find out at DAC. Monday. Lunch included. Free.

OK. Here’s the deal. Cadence wants you to know about the true bleeding edge in Silicon Realization. The ASIC/SoC silicon frontier’s at 20nm. FYI: 28nm is already a day late and a process node short (thanks Richard G!). Want to … Continue reading

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3D Thursday: Six more firms join Sematech 3D initiative

EETimes’ Peter Clarke reports that six more companies have joined the Sematech 3D enablement program. The six new members are: Advanced Semiconductor Engineering Inc. (ASE) Altera Corp Analog Devices Inc. (ADI) LSI Corp On Semiconductor Corp Qualcomm Inc These six … Continue reading

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