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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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Top Posts
- Download a free PDF of the Mixed-signal Methodology Guide, Chapter 1: Design Trends and Challenges
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Qualcomm reveals more Snapdragon 4 SoC details in a White Paper. Want to know what’s inside?
- 3D Thursday: 28nm design and 2.5D packaging saves Xilinx a ton of power. You can too even if you're not designing FPGAs!
- ARM Cortex-A15—does this processor IP core need a new category…Superstar IP?
- My workbench from 1978 highlighted in EETimes as one of engineering’s messiest desks
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
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Tag Archives: AMD
Hot Chips 24 in August will feature a 3D tutorial plus details of new chips from AMD, Intel, Xilinx, and more
This year’s Hot Chips conference takes place on August 24-29 in a new venue: The Flint Center for the Performing Arts in Cupertino, CA. On the afternoon of August 27, there’s a die-stacking tutorial with presentations from AMD, Amkor, SK … Continue reading
Posted in EDA360
Tagged Advanced Micro Devices, AMD, Field-programmable gate array, Hot Chips, Intel, Toshiba, Xilinx
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Heterogeneous SoC design gets its own foundation backed by heavy hitters. Good things sure to follow
I am an unabashed advocate of heterogeneous SoC design. Have been for decades. It’s a system-level design approach that lacks the elegance and academic symmetry of homogeneous processing in exchange for a more efficient, bare-metal, hard-core approach to system design … Continue reading
Posted in ARM, EDA360, ESL, Firmware, SoC, SoC Realization, System Realization
Tagged AMD, ARM, HSA Foundation, ImaginationTechnologies, MediaTek, Moore's law, Texas Instruments
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AMD’s new Trinity APU (Accelerated Processing Unit) for laptops/notebooks is a poster child for IP-centric SoC design
Yesterday, AMD introduced its second generation of A-series APUs (Accelerated Processing Units) that combine two to four Piledriver x86 microprocessor cores—each with 2Mbytes of L2 cache memory—with a Radeon 7000 GPU (Graphics Processing Unit), an HD Media Accelerator, a display … Continue reading
Posted in 32nm, EDA360, Silicon Realization, SoC, SoC Realization
Tagged Advanced Micro Devices, AMD, APU, DDR3, GPU, PCI Express, PCIe, Radeon
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EDPS (April 5-6) in Monterey tackles “Top EDA Problems” with speakers from Broadcom, Cadence, AMD, and Synopsys
Early next month in Monterey, California, the Electronic Design Processes Symposium will take on the “Top Five EDA Problems.” For the purpose of this event, these problems would appear to be DFT (design for testability), System-Level EDA, Parallel EDA, and … Continue reading
Posted in EDA360, Silicon Realization, SoC Realization, System Realization
Tagged AMD, Broadcom, Cadence, RTL, Synopsys
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3D Thursday: AMD Radeon E6460 embedded graphics processor employs two kinds of 3D assembly. One may really surprise you
Earlier this week, AMD launched the Radeon E6460 embedded GPU (graphics processor, see photo below). It’s an entry-level GPU with more than 2x the performance of the previous-generation Radeon E2400 GPU. To get the desired performance from this GPU—it’s capable … Continue reading
What would you do with a 23,000-simultaneous-thread school of piranha?…asks NVIDIA
Last night, Michael Shebanow took members of the local IEEE Computer Society deep into the world of graphics processing and graphics processing units (GPUs). Over an hour and a half, he revealed some interesting and surprising facets to the topic. … Continue reading
Posted in EDA360, Silicon Realization, SoC Realization, System Realization
Tagged AMD, DDR, Fermi, GDDR5, Nvidia
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Go for the GHz? 8-core, Bulldozer-based AMD FX processor hits 8.429 GHz using liquid nitrogen and liquid helium!
You have to admire the timing. On the first day of the Intel Developer Forum, AMD is trying to steal some thunder by announcing a 2-week-old achievement: one of the company’s 8-core, Bulldozer-based FX processor CPUs hit 8.429 GHz running … Continue reading
Posted in EDA360, Silicon Realization
Tagged AMD, Bulldozer, FX processor, overclocking
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Microprocessor Report pries a few more secrets from the Apple A5 processor and asks if Intel should break itself in two
A few weeks back, I wrote about the Apple A5 processor [link] introduced along with the iPad2. (See “Peeling back the layers of the onion that’s Apple’s A5 processor for the iPad2”) At that time, there wasn’t much hard information … Continue reading
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