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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- 10 ways to get your EDA tools to run faster, smoother, and longer
- 39 low-cost boards for embedded Linux application development starting with Raspberry Pi. Want the list?
- What would you do with a 23,000-simultaneous-thread school of piranha?...asks NVIDIA
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Tag Archives: GDDR5
Zowie! More than 50 x86 cores on the Intel Knights Corner Manycore Coprocessor
Today at the Hot Chips 24 conference, George Chrysos discussed the Intel MIC (Many Integrated Core) architecture of the Knights Bridge chip, to be formally called the Intel Xeon Phi coprocessor. This chip runs Linux, but it’s designed to act … Continue reading
Posted in EDA360, Silicon Realization, SoC, SoC Realization, System Realization
Tagged GDDR5, Intel, Knights Bridge, Manycore, Phi, Xeon
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What would you do with a 23,000-simultaneous-thread school of piranha?…asks NVIDIA
Last night, Michael Shebanow took members of the local IEEE Computer Society deep into the world of graphics processing and graphics processing units (GPUs). Over an hour and a half, he revealed some interesting and surprising facets to the topic. … Continue reading
Posted in EDA360, Silicon Realization, SoC Realization, System Realization
Tagged AMD, DDR, Fermi, GDDR5, Nvidia
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