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- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
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- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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Top Posts
- 3-processor SoC for digital still cameras incorporates an ARM 1136J-S RISC processor core plus separate image and video processors
- 39 low-cost boards for embedded Linux application development starting with Raspberry Pi. Want the list?
- Xilinx Zynq EPPs based on two ARM Cortex-A9s create a new category that fits in among SoCs, FPGAs, and microcontrollers
- 3D Thursday: Intel Penwell SoC for mobile phones employs POP (package-on-package) LPDDR2 SDRAM to reduce power
- 3D Thursday: 28nm design and 2.5D packaging saves Xilinx a ton of power. You can too even if you're not designing FPGAs!
- EDA360 and the brand new Hewlett-Packard 15C Limited Edition RPN pocket scientific calculator
- ARM big.LITTLE multicore IP architecture wins a Microprocessor Report Analysts’ Choice Award
- The WORD on ARM’s big.LITTLE Cortex-A15/A7 design philosophy from Jack Ganssle, a leading expert and consultant on embedded design and firmware development
- Learn to use AI in design work after a great slice of Costco pizza. The talk is free. Pizza: $2
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
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Tag Archives: GDDR5
Zowie! More than 50 x86 cores on the Intel Knights Corner Manycore Coprocessor
Today at the Hot Chips 24 conference, George Chrysos discussed the Intel MIC (Many Integrated Core) architecture of the Knights Bridge chip, to be formally called the Intel Xeon Phi coprocessor. This chip runs Linux, but it’s designed to act … Continue reading
Posted in EDA360, Silicon Realization, SoC, SoC Realization, System Realization
Tagged GDDR5, Intel, Knights Bridge, Manycore, Phi, Xeon
2 Comments
What would you do with a 23,000-simultaneous-thread school of piranha?…asks NVIDIA
Last night, Michael Shebanow took members of the local IEEE Computer Society deep into the world of graphics processing and graphics processing units (GPUs). Over an hour and a half, he revealed some interesting and surprising facets to the topic. … Continue reading
Posted in EDA360, Silicon Realization, SoC Realization, System Realization
Tagged AMD, DDR, Fermi, GDDR5, Nvidia
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