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Recent Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Qualcomm reveals more Snapdragon 4 SoC details in a White Paper. Want to know what’s inside?
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- ARM unveils 64-bit v8 architecture at ARM TechCon 2011
- 3-processor SoC for digital still cameras incorporates an ARM 1136J-S RISC processor core plus separate image and video processors
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Tag Archives: Intel
3D Thursday: Intel Penwell SoC for mobile phones employs POP (package-on-package) LPDDR2 SDRAM to reduce power
Wednesday at the Hot Chips 24 conference, Rumi Zahir of Intel discussed the company’s Penwell SoC designed for cell phone handsets. The SoC is employed in the Medfield cellular handset design and it’s based on the Intel Atom x86 processor … Continue reading
Posted in 3D, EDA360, Packaging, Silicon Realization, SoC, SoC Realization, System Realization
Tagged eMMC, Intel, Intel Atom, LPDDR2, Medfield, mobile phone, SDRAM, SoC
7 Comments
Zowie! More than 50 x86 cores on the Intel Knights Corner Manycore Coprocessor
Today at the Hot Chips 24 conference, George Chrysos discussed the Intel MIC (Many Integrated Core) architecture of the Knights Bridge chip, to be formally called the Intel Xeon Phi coprocessor. This chip runs Linux, but it’s designed to act … Continue reading
Posted in EDA360, Silicon Realization, SoC, SoC Realization, System Realization
Tagged GDDR5, Intel, Knights Bridge, Manycore, Phi, Xeon
2 Comments
Hot Chips 24 in August will feature a 3D tutorial plus details of new chips from AMD, Intel, Xilinx, and more
This year’s Hot Chips conference takes place on August 24-29 in a new venue: The Flint Center for the Performing Arts in Cupertino, CA. On the afternoon of August 27, there’s a die-stacking tutorial with presentations from AMD, Amkor, SK … Continue reading
Posted in EDA360
Tagged Advanced Micro Devices, AMD, Field-programmable gate array, Hot Chips, Intel, Toshiba, Xilinx
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3D Thursday: 3D IC success stories—a DAC panel. June 7
What better way to understand the realities of 3D IC assembly than to listen to the pioneers who have already taken the arrows so you won’t have to? That’s the topic of the upcoming DAC panel: “Is 3-D Ready for … Continue reading
Posted in 2.5D, 3D, EDA360, Silicon Realization
Tagged 2.5D, 3D, Cadence, IBM, Intel, Three-dimensional integrated circuit, TSMC, Xilinx
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Professor Chenming Hu talks FinFETs and FDSOI at the GSA Silicon Summit
Chenming Hu, TSMC Distinguished Chair Professor of Microelectronics at University of California at Berkeley gave a keynote talk on FinFETs and FDSOI (fully depleted silicon on insulator) today at the GSA Silicon Summit held at the Computer History Museum in … Continue reading
LeCroy’s “Basic” Edition Advisor T3 USB 3.0 Protocol Analyzer costs $2995
The latest USB buzz has notebook computers with SuperSpeed USB 3.0 ports becoming common by mid year, thanks to last week’s announcement of USB 3.0 protocol support in Intel’s 7-Series chipset for current-generation Intel Core processors and next-generation Ivy Bridge … Continue reading
Posted in EDA360, SoC, SoC Realization, System Realization, USB, VIP
Tagged Intel, Ivy Bridge, Sandy Bridge, SuperSpeed, USB, USB 3.0
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Friday Video: Intel realizes 2001 musical CGI tour de force—“Pipe Dream”—with Atom-powered Industrial Controllers
Last week for Friday Videos, I posted several musical videos based on “musique concrete” performances by floppy drives and other hardware. Little did I know that I’d run into a live example at this week’s Design West (the conference formerly … Continue reading
Hardware/Software Codesign: Pink elephants on parade?
As part of this week’s DVCon event being held in Silicon Valley, the EDAC Emerging Companies Committee sponsored a really intense and well-attended evening panel on hardware/software codesign. The effervescent Paul McLellan moderated the panel. (If you’ve not read his book, … Continue reading
Posted in EDA360, Firmware, SoC, SoC Realization, System Realization, Virtual Prototyping
Tagged Cadence, codesign, codevelopment, EDA, hardware/software, Intel, Lockheed-Martin, Xilinx
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3D Thursday: Lessons learned from the IMEC’s 3D DRAM-on-logic chip design work
I recently covered the groundbreaking WIOMING 3D chip design done by CEA-Imec in conjunction with ST-Ericsson. (See “3D Week: Wide I/O SDRAM, Network on Chip, Multicore, TSV, Asynchronous Logic—3D SoC stack from CEA-Leti and ST-Ericsson hits all the advanced notes. … Continue reading
GSA Silicon Summit to highlight cutting-edge IC technologies: 3D IC assembly, FinFETs, and SOI. April 26, Silicon Valley
The Global Semiconductor Alliance (GSA) is sponsoring a half-day event that will drill down into three of the leading-edge IC manufacturing technologies of the coming decade: 3D (and 2.5D) IC assembly, FinFETs (or Tri-gate FETs), and silicon-on-insulator (SOI) substrates. The … Continue reading
Posted in 2.5D, 20nm, 28nm, 32nm, 3D, EDA360, FDSOI, Silicon Realization, SoC, SoC Realization
Tagged Cisco, FinFET, IBM, Intel, Multigate device, STMicroelectronics, Tri-Gate
1 Comment
Flash Memory Summit: Top 10 things you need to know about NAND Flash
An annual panel that now traditionally closes the Flash Memory Summit (held last week in Santa Clara, CA) is Andy Marken’s “Top 10 things you need to know about NAND Flash.” It’s a great way to sum up the events … Continue reading
Posted in EDA360, Memory, Silicon Realization, SoC Realization, System Realization
Tagged Flash, Intel, NAND, SSD, Storcloud
1 Comment
Intel’s Knut Grimsrud explains how to get another 20x improvement in SSD performance
“The coolest consumer devices use NVM (non-volatile memory)” said Intel Fellow Knut Grimsrud, who gave a keynote speech at this week’s Flash Memory Summit http://www.flashmemorysummit.com. We’ve seen SSD (solid-state disk) performance advances on the order of 20x from 2005 through … Continue reading
David Manners writes about ARM versus Intel in the FinFET wars
We like nothing more in this industry than a good fight. It drives a lot of discussion. If you can’t get your fill, zip on over to David Manner’s blog “ARM Unfazed by Finfets” to get an up-to-the-minute discussion of … Continue reading
3D Thursday: EETimes backs away from an apples and oranges comparison. Makes fruit salad
Earlier in July, Dylan McGrath at EETimes published an article about a report that pitted TSMC and Intel in a race to 3D. Unfortunately, there’s not really a race. TSMC’s efforts are towards 3D chip assembly. That’s the kind of … Continue reading
Posted in 3D, EDA360, Silicon Realization, SoC Realization, System Realization
Tagged Intel, TSMC
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So soon? Lenovo announces ARM- and x86-based tablets. An early skirmish in the war for PC processor sockets?
For the last two days, I’ve written about the ramifications of the IHS iSuppli report on ARM processor penetration into the PC market. (See “IHS iSuppli predicts that ARM CPUs will grab nearly 25% of the PC market by the … Continue reading
Posted in ARM, EDA360, Silicon Realization, SoC Realization, System Realization
Tagged Android, Android Market, IdeaPad, Intel, Lenovo, Microsoft Windows, Nvidia, Nvidia Tegra, ThinkPad
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3D Thursday: IMEC prototypes 3D chip stack, finds some thermal surprises
Imec and several of its 3D integration partners (Globalfoundries, Intel, Micron, Panasonic, Samsung, TSMC, Fujitsu, Sony, Amkor, and Qualcomm) have fabricated a 3-chip 3D IC stack demonstration prototype with the intent of proving several assembly methods plus electrical characteristics and … Continue reading
Posted in 3D, Silicon Realization, SoC Realization, System Realization, TSMC, TSV
Tagged Amkor, Fujitsu, GlobalFoundries, Imec, Intel, Micron, Panasonic, Qualcomm, Samsung, Sony, TSMC
1 Comment
PCI Express takes on Apple/Intel Thunderbolt and 16 Gtransfers/sec at PCI SIG while PCIe Gen 3 starts to power up
Two articles from EETimes give an exciting picture for PCI Express’ short- and long-term future. On the most immediate front, 23 adapter cards and 19 systems from PC and peripheral makers participated in the most recent PCIe Gen 3 plugfests. … Continue reading
Posted in EDA360, Silicon Realization, SoC Realization, System Realization
Tagged Advanced Micro Devices, HP, IBM, Intel, Intel Corporation, PCI Express, PCI SIG
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Are FinFETs inevitable at 20nm? “Yes, no, maybe” says Professor Chenming Hu (Part 2)
Yesterday’s blog entry discussed FinFETs as a way to build advanced-process transistors with reduced leakage and improved performance. (See “Are FinFETs inevitable at 20nm? “Yes, no, maybe” says Professor Chenming Hu (Part 1)“.) There’s another way to eliminate the unwanted … Continue reading
Posted in EDA360, Silicon Realization
Tagged ETSOI, FinFET, IBM, Intel, Soitec, UTBSOI
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Are FinFETs inevitable at 20nm? “Yes, no, maybe” says Professor Chenming Hu
Intel announced in early May that it would be using “Tri-Gate” FETs to build microprocessors at the 22nm node. (See the previous EDA360 Insider post “3D Thursday: Intel and FinFETs (Tri-Gate transistors)—a different kind of 3D”). Intel’s Tri-Gate transistor structures … Continue reading
Posted in EDA360, Low Power, Silicon Realization
Tagged ETSOI, FinFET, Intel, Tri-Gate, UTBSOI
3 Comments
“Welcome to the era of Smart Devices”says Intel’s Gadi Singer. Are you ready for the design competition?
Intel’s Gadi Singer (vice president and general manager of Intel’s SoC Enabling Group) gave the keynote presentation at DAC 2011 yesterday and he discussed the evolution of electronic devices into vehicles that deliver experiences. To do this, these devices must … Continue reading
Microprocessor Report pries a few more secrets from the Apple A5 processor and asks if Intel should break itself in two
A few weeks back, I wrote about the Apple A5 processor [link] introduced along with the iPad2. (See “Peeling back the layers of the onion that’s Apple’s A5 processor for the iPad2”) At that time, there wasn’t much hard information … Continue reading
3D Thursday: Intel and FinFETs (Tri-Gate transistors)—a different kind of 3D
Earlier this month, Intel announced that it will be using Tri-Gate transistors (FinFETs) to build microprocessors at the 22nm process node. The microprocessor is code-named “Ivy Bridge.” It will be a 22nm version of the company’s Sandy Bridge processor and … Continue reading
Posted in 3D, EDA360, Low Power, Silicon Realization, SoC Realization
Tagged 22nm, FinFET, Intel, Ivy Bridge, Sandy Bridge, Tri-Gate, TSMC
3 Comments
Friday Video: Intel Core i5 powers penguins
Not for the first time, Intel is using the Madagascar movie animation characters to call attention to its processors. This time, it’s the 2nd-generation Core i5 processor. – And here’s what you can do with the same characters if you … Continue reading
3D Thursday: Six more firms join Sematech 3D initiative
EETimes’ Peter Clarke reports that six more companies have joined the Sematech 3D enablement program. The six new members are: Advanced Semiconductor Engineering Inc. (ASE) Altera Corp Analog Devices Inc. (ADI) LSI Corp On Semiconductor Corp Qualcomm Inc These six … Continue reading
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