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Top Posts
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
- My workbench from 1978 highlighted in EETimes as one of engineering’s messiest desks
- Friday Video (Musical Bonus): What does it take to play the Dr. Who theme song with a pair of Tesla coils, a Faraday cage, and two unlucky audience members?
- Asymmetric, dual-core NXP LPC4300 microcontrollers split tasks between ARM Cortex-M4 and -M0 cores, cost $3.75 and up
- Welcome to 3D Week: Why is 3D important? Now? The memory wall, heat, and disposable sensors
- 3D Thursday: Generation-jumping 2.5D Xilinx Virtex-7 2000T FPGA delivers 1,954,560 logic cells using 6.8 BILLION transistors (UPDATED!)
- Want a peek at a possible Qualcomm 3D IC roadmap?
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Tag Archives: Medfield
3D Thursday: Intel Penwell SoC for mobile phones employs POP (package-on-package) LPDDR2 SDRAM to reduce power
Wednesday at the Hot Chips 24 conference, Rumi Zahir of Intel discussed the company’s Penwell SoC designed for cell phone handsets. The SoC is employed in the Medfield cellular handset design and it’s based on the Intel Atom x86 processor … Continue reading
Posted in 3D, EDA360, Packaging, Silicon Realization, SoC, SoC Realization, System Realization
Tagged eMMC, Intel, Intel Atom, LPDDR2, Medfield, mobile phone, SDRAM, SoC
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