Xilinx Zynq EPPs based on two ARM Cortex-A9s create a new category that fits in among SoCs, FPGAs, and microcontrollers

After telegraphing its punch at ESC last spring, Xilinx has now introduced the first four members of its EPP product line, which is based on a dual-core ARM Cortex-A9 processor complex, and has named them Zynq to differentiate them from the company’s FPGAs. (See “Xilinx redefines the high-end microcontroller with its ARM-based Extensible Processing Platform – Part 1” and “Xilinx redefines the high-end microcontroller with its ARM-based Extensible Processing Platform – Case Studies – Part 2”.) Two of the four Zynq family members are designed for low-power applications and the other two emphasize performance over power. “What’s an EPP?” you might ask. It’s an “Extensible Processing Platform,” a new IC category Xilinx hopes to create. Think of an EPP as an embedded processor with an attached FPGA fabric. “Haven’t they tried this before?” you’re now asking. Yes, they have. This time, the difference is that Xilinx is emphasizing the “processor” aspect of the device over the FPGA aspect—and you can expect that change in emphasis to make all the difference.

The ARM-based Xilinx Zync EPP family is designed to wedge in between ASICs or SoCs, microcontrollers, and FPGAs. What Xilinx has done is leverage its 28nm expertise—earned from its development of the company’s Artix/Kintex/Virtex-7 FPGAs—and used that  expertise to develop a new type of product that’s mostly hardened processor cores (with associated memory and peripherals) and then added a layer of FPGA fabric, like icing on a cake, to produce a new confection.Here’s a block diagram:

With the smaller Zynq parts selling for less than $15 in volume, these confections will clearly catch the eye of many, many system designers trying to get the most bang for their silicon buck. Zynq EPPs will be available in first silicon starting in the second half of 2011 with general engineering samples available in 1H2012.

You can get more technical information about the Zynq family starting today at the Xilinx site and a more technical explanation from my blog on the www.low-powerdesign.com Web site. However, for this EDA360 Insider blog, it’s more appropriate to discuss what the Zynq EPP family means in the context of the EDA360 vision. Xilinx has created a compelling value proposition with the new Zynq EPPs. It’s quite common for system-design teams to couple some sort of embedded processor with an FPGA in many designs that haven’t the volume needed to justify the design of a custom SoC. The Zynq EPPs offer yet another alternative—one that merges a dual-core embedded processor with a state-of-the-art FPGA fabric and connects the two with a high-bandwidth connection. Moreover, the Xylinx Zynq EPPs give system designers access to 28nm process technology at a relatively low component cost, low NRE (no need to redesign the processor complex), and zero mask and fab costs. This mixture of capability, performance, and cost simply cannot be replicated with a 2-chip design. Going forward, few system-design teams will be able to avoid at least considering Zynq EPPs in their preliminary architectural explorations. Sure, if you’re building a mobile telephone handset, then a Zynq EPP clearly isn’t for you. If a low-cost microcontroller selling for a buck or so will do the job, that’s an obvious right choice rather than a Xilinx EPP. Custom SoCs still win the day for high-volume, low-power, high-performance applications. For in-between system designs, the Xilinx Zynq EPPs seem like they’re going to be mighty attractive.

The Zynq EPP family fits in quite well with the EDA360 tenet of System Realization. The Xilinx Zynq components are perfect app-execution machines with their dual ARM Cortex-A9 processor cores and broad ARM ecosystem support. They are also prime targets for architectural exploration because their basic design—a processor-centric system with connected peripherals—is a familiar architecture to most design teams. If the addition of some custom hardware peripherals will get the System-Realization team where it needs to go, then the Zynq EPP family is a good alternative—one that deserves your consideration.


About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at https://eda360insider.wordpress.com/)
This entry was posted in ARM, EDA360, Low Power, SoC Realization, System Realization. Bookmark the permalink.

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