Fast serial I/O—What’s its future in the embedded world?

Tom Williams, Editor-in-Chief of RTC Magazine, recently published an editorial titled “Fast Serial Interconnects— Will They Bypass Embedded or Bring it Along?” In this editorial, Williams ponders the question of fast I/O port suitability for embedded design. He writes:

“Once an interface technology, a connector, or an interconnect is adapted into the PC world with its huge volumes, costs plummet making it attractive for other uses and, where technically appropriate, these naturally include embedded. This has certainly been the case with a number of serial interconnect technologies such as USB and PCI Express.”

Williams’ editorial later continues:

“USB 3.0 now hits 5 Gbit/s and PCIe 3.0 is hitting a nominal rate of 8 Gbit/s and that is on one lane (x1). For high-speed graphics and other demanding applications, it can go to x16. Now Intel is actively promoting its Thunderbolt interconnect, which clocks in at 10 Gbit/s, and the PCI SIG has let it be known that it is working on a PCIe 4.0 spec that is targeted to get to 16 Gbit/s. Technically, PCI SIG talks in transfers (GT/s) because there are coding and other issues that can add some overhead to the actual transmission of data.”

And then Williams asks the critical question here:

“Our question, of course, is how these developments apply to embedded systems. My own take on that is that the ever-increasing speeds will not mean much to what we consider “typical” embedded systems. But that does not necessarily apply to non-typical embedded systems, those we may not have thought of yet, or have failed to recognize as falling into our esoteric realm.”

By “typical” embedded systems, I gather that Williams means products such as thermostats, motor controllers, lighting-control systems, and the like. These systems don’t move large amounts of data around. They don’t have high-bandwidth requirements for the processor-DRAM connection or for high-speed video.

Nevertheless, I know from experience that sharp system designers tend to exploit any advanced feature they can obtain at low cost. What comes immediately to mind is the 10/100 Mbps Ethernet port on the NXP LPC4300 series microcontroller family I wrote about yesterday. (See “Asymmetric, dual-core NXP LPC4300 microcontrollers split tasks between ARM Cortex-M4 and -M0 cores, cost $3.75 and up”) Members of this NXP microcontroller family cost just a few bucks each but they sport “high-speed” Ethernet ports. I remember designing my first 10Mbps Ethernet port into a Cadnetix CAD workstation in 1982 and I guarantee you, there was nothing “low-cost” about it. Twenty years ago, there was absolutely no way to predict that Ethernet would become so ubiquitous or that it would take hold in the embedded world. Now we routinely talk about the “Internet of things” so there’s no need to predict. That world is now here.

Which is to say that I fully expect sharp design teams to exploit high-speed I/O ports such as USB 3.0 and PCIe 3.0 to perform unimagined feats of embedded daring-do as soon as it becomes economically feasible to do so. In fact, I am sure there are embedded design teams already waiting for the first chance to use such high-speed ports in their designs.


About sleibson2

EDA360 Evangelist and Marketing Director at Cadence Design Systems (blog at
This entry was posted in EDA360, IP, SoC, SoC Realization, Verification and tagged , , , . Bookmark the permalink.

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