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- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
- Friday Video: A different kind of fab with some very, very cool machines
- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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Top Posts
- Download a free PDF of the Mixed-signal Methodology Guide, Chapter 1: Design Trends and Challenges
- A head-to-head comparison of the ARM Cortex-M4 and –M0 processor cores by Jack Ganssle
- Qualcomm reveals more Snapdragon 4 SoC details in a White Paper. Want to know what’s inside?
- ARM Cortex-A15—does this processor IP core need a new category…Superstar IP?
- My workbench from 1978 highlighted in EETimes as one of engineering’s messiest desks
- 3D Thursday: 28nm design and 2.5D packaging saves Xilinx a ton of power. You can too even if you're not designing FPGAs!
- ARM unveils 64-bit v8 architecture at ARM TechCon 2011
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
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Category Archives: Texas instruments
TI Stellaris LaunchPad eval board features ARM Cortex-M4F. Intro price: $4.99. Get yours now.
Texas Instruments’ Stellaris LM4F120H5QRC microcontroller is based on an 80MHz copy of the ARM Cortex-M4F processor core with an integrated single-precision floating-point unit. It also includes 256Kbytes of Flash memory, 32Kbytes of SRAM, 2Kbytes of EEPROM, and a host … Continue reading
Posted in ARM, Cortex-M4, EDA360, SoC Realization, Texas instruments
Tagged ARM Cortex-M4F, microcontroller, Stellaris LaunchPad, Texas Instruments, USB
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TI Stellaris promo features ARM Cortex-M4F dev board for $4.99—or possibly free
You’ve got a little more than a month to sign up for a $4.99 TI Stellaris Launch Pad Dev board based on the ARM Cortex-M4F processor core. Register and you get on the list to purchase a board for $4.99 … Continue reading
If Aladdin’s Genie lived in a Computer-on-Module, it might look like the Gumstix Overo
One of the funniest lines in the 1992 animated Disney movie “Aladdin” is when the frenetic blue Genie, voiced by the incredible Robin Williams, describes his situation: “PHENOMENAL COSMIC POWERS; Itty-bitty living space,” referring to his life in a lamp. … Continue reading
Gary Smith proposes a 3-layer taxonomy for platform-based SoC design—Live from DAC 2012
EDA’s chief analyst Gary Smith is high on IP subsystems—big ones. Only Gary calls them platforms. Why is Smith so enthusiastic? Because, as he says, he was wrong last year in his estimates of how much it costs to develop … Continue reading
Posted in DAC, IP, SoC, SoC Realization, System Realization, Texas instruments
Tagged ARM, Armada, Design Compiler, Marvell, Nvidia, OMAP, Qualcomm, Snapdragon, Tegra
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Friday Video: Dave Jones tears down a Zoom H1 audio recorder. You learn more about system design.
Australia’s Dave Jones records many videos for his Web site, http://www.eevblog.com, and every Tuesday he tears down another electronic product for educational purposes (and for fun). This week, he’s torn down a product I actually own: a Zoom H1 handheld … Continue reading
Posted in EDA360, System Realization, Texas instruments
Tagged Dave Jones, mp3, USB, WAV, Zoom H1
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Playing poker with applications processors: Can two ARM Cortex-A15 cores beat four ARM Cortex-A9 cores?
One maxim in the multicore biz is that more (processor cores) is better. Is that really true? All the time? “No” says Texas Instruments. In connection with this weeks (MWC) Mobile World Congress neing held in Barcelona, Texas instruments has … Continue reading
How do you break the GHz barrier with ARM Cortex-A15 processor cores? Another chance to get a leg up on your SoC Realization competitors at ARM TechCon 2011
On Tuesday, October 25, you will learn how Texas Instruments and Cadence goosed the ARM Cortex-A15 processor core into the GHz+ range using an end-to-end digital design flow that includes physical-aware logic synthesis, DFT, timing optimization, optimized CTS (clock-tree synthesis), … Continue reading
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