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- Friday Video: SoC in tiny 500mg backpack transforms cockroach into radio-controlled exploration vehicle
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- Friday Video: Get the latest skinny on the IPC-2581 open interchange standard for PCB design
- Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
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Top Posts
- 3-processor SoC for digital still cameras incorporates an ARM 1136J-S RISC processor core plus separate image and video processors
- 39 low-cost boards for embedded Linux application development starting with Raspberry Pi. Want the list?
- Xilinx Zynq EPPs based on two ARM Cortex-A9s create a new category that fits in among SoCs, FPGAs, and microcontrollers
- 3D Thursday: Intel Penwell SoC for mobile phones employs POP (package-on-package) LPDDR2 SDRAM to reduce power
- 3D Thursday: 28nm design and 2.5D packaging saves Xilinx a ton of power. You can too even if you're not designing FPGAs!
- EDA360 and the brand new Hewlett-Packard 15C Limited Edition RPN pocket scientific calculator
- ARM big.LITTLE multicore IP architecture wins a Microprocessor Report Analysts’ Choice Award
- The WORD on ARM’s big.LITTLE Cortex-A15/A7 design philosophy from Jack Ganssle, a leading expert and consultant on embedded design and firmware development
- Learn to use AI in design work after a great slice of Costco pizza. The talk is free. Pizza: $2
- Ingenious architectural features allow ST to extract maximum performance from new microcontroller family based on ARM Cortex-M4. Cost: less than 6 bucks in 1000s
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Tag Archives: PHY
Smartphones: Where PCIe has not gone before—but will. Sooner rather than later.
Rick Merritt has just published an interesting article in EETimes: the PCI Special Interest Group (PCI SIG) expects to announce an adaptation of the ever-popular PCIe interface for mobile devices including smartphones. Merritt reports that the PCI SIG and MIPI … Continue reading
Posted in EDA360, IP, Mobile, SoC Realization, System Realization
Tagged MIPI Alliance, PCI Express, PCI SIG, PHY
2 Comments
3D Thursday: 40G and 100G optical Ethernet—Killer 3D app? Perhaps. Compelling? Definitely.
I’ve written several times about Wide I/O DRAM and how its speed and power advantages make it a slam dunk and killer app for 3D IC assembly. I saw another such 3D IC killer app this week at the Ethernet … Continue reading
Posted in 2.5D, 3D, EDA360, Silicon Realization, SoC, SoC Realization, System Realization
Tagged 100 Gigabit Ethernet, 100G, 40G, AOC, Ethernet, Luxtera, MSA, PHY, Xilinx
5 Comments
Cadence announces synthesizable 40G and 100G Ethernet Controller, PCS, and BEAN (Backplane Ethernet Auto-Negotiation) IP
In conjunction with this week’s Ethernet Technology Summit being held in San Jose, Cadence has announced commercial availability of MAC (Media Access Control), PCS (Physical Coding Sublayer) and BEAN (Backplane Ethernet Auto-Negotiation) IP blocks. The 40/100G MAC controller is fully … Continue reading
Posted in EDA360, Silicon Realization, SoC, SoC Realization
Tagged 100 Gigabit Ethernet, 100G, 40G, Ethernet, Gigabit Ethernet, Media Access Control, MII, PCS, PHY, SerDes, Verilog
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